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Satanic Rites 4
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Satanic Rites - Issue 4 (1993-05-29)(Destiny).adf
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680x0_Interrupts
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1990-01-05
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}0a000
{g -============================================-
{g -= =-
{g-= {fInterrupt Handling for Faster Processors {g=-
{g-= =-
{g-= {f by {g =-
{g-= =-
{g-= {f Terminator / Destiny {g =-
{g-= =-
{g-============================================-
{a
This article will show you the correct way to set up interrupts on all
versions of the 680x0 processor.
A major incompatablity problem on 68010 + processors is the way in which you
set the interrupt vectors.
Most demo programmers use the following line to set up the level 3
interrupt.
{f Move.l #MyLev3,$6c.w{a
Well, this will work fine on the {cMC68000{a.
{a But on every processor higher than the {e68010{a, the first $100 bytes of memory
can be anywhere!
This is due to the existance of something called the V.B.R. Which stands
for Vector Base Register.
Commodore wanted to fix the vector table into fastram when they first wrote
{eWorkbench 2.0 {abut due to the immense incompatablity due to everyone accessing
the interrupt vectors directly, they couldn't.
The following routine will allow you to access the interrupt vectors easily
Modify it to suit your own needs.
{cNOTE! {a This apply's for any read/write operation between 4.w and $100.w The
only fixed address is 4.w (Execbase)
{a;{g----------------------------------------------------------------------------
{a;{g-----{f Software interrupt handling routines {g-----
{a;{g----------------------------------------------------------------------------
{a;{e This one should now work on other processors.
{a;{e Because with the 68010 + you can specify where the vector base table is
{a;{e in memory and if its been moved and we access $6c.w .... BOOM @!
{a;{e So we have to use offset $6c from the vector base register.
{a;{e But first, we have to figure out what processor we're running on...
{a;{e Take the attnflags from exec. There are several bits,
{a;{e each stands for a certain processor.
{a;{e
{a;{e bit 0 - 68010
{a;{e bit 1 - 68020
{a;{e bit 2 - 68030 only OS2
{a;{e bit 3 - 68040 only OS2
{a;{e bit 4 - 68881
{a;{e bit 5 - 68882 only OS2
{a;{e
{a;{e note that on a 68020 the 68010 bit is set too etc.
{f Setupinterrupts move.l 4.w,a6 {a;{e execbase
{f moveq.l #0,d0 {a;{e Clear reg
{f move.w $128(a6),d0 {a;{e Attnflags from execbase
{f and.w #$f,d0 {a;{e Anything else than 68000 ??
{f beq.s .its68000 {a;{e No. Normal 68000 processor
{f move.l a5,-(a7) {a;{e Save a5
{f lea getvbr(pc),a5 {a;{e point to Supervisor code
{f jsr -30(a6) {a;{e Supervisor mode
{f move.l (a7)+,a5 {a;{e Restore a5
{f move.l d0,currentvbr {a;{e updated vector base
{f .its68000
{c ; Now I know where the vector table is so we use an offset
; from the base to get the address we wanna change
{f move.l currentvbr(pc),a0
{f move.l $6c(a0),OldLev3
{f Lea MyLev3(PC),a1 {a;{e Point to my level 3 interrupt
{f Move.l a1,$6c(a0) {a;{e Set New Level 3 interrupt
{f Rts
{a;{e this piece of code gets the VBR (if available).
{a;{e this is necessary for accessing $0-$200.
{a;{e on a 68010 or higher the interrupt table can be placed
{a;{e anywhere.
{f getvbr dc.l $4e7a0801
{a;{e The previous longword is the 680x0 instruction movec vbr,d0
{a;{e Most assemblers don't understand it
{f rte
{f currentvbr dc.l 0
{f Restoreinterrupts
{f move.l currentvbr(pc),a0
{f Move.l Oldlev3(PC),$6c(a0) {a;{e Reset Level 3 interrupt
{f Rts
{a Another thing which isn't really well known is that you can only use certain
exec functions In an interrupt handler.
{a The following exec functions can be safely performed during interrupts:
{f Alert
Disable
Cause
Enable
Findname
Findport
Findtask
Putmsg
Replymsg
Signal
{a In addition, if you are manipulating your own list structures during
interrupt code, you can also use the following functions:
{f Addhead
Adtail
Enqueue
Remhead
Remtail
{aOkay, that should help you a little bit!
My thanks must go to {gGeorg Hoermann {afor help with the VBR code.